1. Field of the Invention
The present invention relates generally to an efficient dynamic register file design for multiple simultaneous bit encodings.
2. Description of the Related Art
FIG. 6 is a prior art system 600 for decoding original input values, referred to herein as tags or tag values, and then re-encoding the decoded tag values to produce re-encoded output tag values. To simplify the explanation it is assumed that there are 8 different original input tag values, although any number of input tag values can be used. Since there are 8 different values, each input tag value is a 3-bit binary number.
System 600 includes a separate decoder for each input tag. Each decoder decodes the input tag that it receives in order to produce a decoded output.
For example, decoder 602 decodes a first input tag, input tag 604, and outputs decoded value 606. A separate decoder, decoder 608, decodes a second input tag, input tag 610, and outputs decoded value 612. Additional separate decoders, not shown, decode the 3rd-6th input tags to produce the 3rd-6th decoded values. Decoder 614 decodes input tag 616, and outputs decoded value 618. Decoder 620 decodes input tag 622, and outputs decoded value 624.
A transpose network 626 receives the 8 8-bit decoded values from all of the decoders. Transpose network 626 transposes the decoded values it receives. Transpose network 626 then outputs 8 transposed values. Transpose network 626 outputs each one of the 8 columns as an 8-bit transposed value to an encoder. There is one encoder for each one of the 8 values. For example, the first column is output to encoder 628 as 8-bit value 630. Encoder 628 then encodes value 630 and outputs the encoded value as 3-bit output tag 632.
The second column is output to encoder 634 as 8-bit value 636. Encoder 634 then encodes value 636 and outputs the encoded value as 3-bit output tag 638.
Columns 3-6 are output to separate encoders, not shown, as 8-bit values in a similar manner to that described above. These encoders then encode those 8-bit values and output the encoded values as 3-bit tag values.
The 7th column is output to encoder 640 as 8-bit value 642. Encoder 640 then encodes value 642 and outputs the encoded value as 3-bit output tag 644.
The 8th column is output to encoder 646 as 8-bit value 648. Encoder 646 then encodes value 648 and outputs the encoded value as 3-bit output tag 650.
The 8 3-bit tag values are then received by and stored in storage 652.
According to the prior art, system 600 does not store the decoded values 606, 612, 618, and 624. System 600 stores only the re-encoded tags 632, 638, 644, and 650.
The prior art decodes the 8 3-bit original tags in parallel using a separate decoder for each 3-bit value. As a result of using a separate decoder for each input tag value, system 600 requires a substantial amount of physical space in which to implement these decoders. In addition, system 600 requires a substantial amount of power in order to simultaneously power all of those separate decoders.
The same disadvantages exist in the prior art for re-encoding the transposed values. There is a separate encoder for each transposed value. Therefore, in the example given, there are 8 separate encoders. As a result of using a separate encoder for each transposed value, system 600 requires a substantial amount of physical space to implement these encoders. In addition, system 600 requires a substantial amount of power in order to simultaneously power all of those separate encoders.